Real-Time Face Detection and Human Tracking System on FPGA Cyclone-V
Abstract
Face detection in image sequence (real-time video stream) has been an active research area in the computer vision field in recent years due to its potential applications such as surveillance cameras, human computer interfaces, smart rooms, intelligent robots and biomedical image analysis. Face detection is a process that determines whether an image has a face or not. In this paper, an embedded system for detecting and tracking human faces in real-time video stream implemented on FPGA DE10-Nano is proposed. The system can be divided into two parts: data streaming, data processing. Experimental results show that the system is capable of accurately detecting faces of up to 5 different people at a distance of up to 1.5 meters from the camera, coexisting in the same frame in resolution of 320 × 240 pixels with a detection speed of only several hundred milliseconds prove the feasibility of the system. A comparison with similar existing projects will be discussed for evaluation and conclusion as well.- REAL-TIME FACE DETECTION AND HUMAN TRACKING SYSTEM ON FPGA CYCLONE-V
- REAL-TIME FACE DETECTION AND HUMAN TRACKING SYSTEM ON FPGA CYCLONE-V
- REAL-TIME FACE DETECTION AND HUMAN TRACKING SYSTEM ON FPGA CYCLONE-V
- REAL-TIME FACE DETECTION AND HUMAN TRACKING SYSTEM ON FPGA CYCLONE-V
- REAL-TIME FACE DETECTION AND HUMAN TRACKING SYSTEM ON FPGA CYCLONE-V
- REAL-TIME FACE DETECTION AND HUMAN TRACKING SYSTEM ON FPGA CYCLONE-V
- REAL-TIME FACE DETECTION AND HUMAN TRACKING SYSTEM ON FPGA CYCLONE-V
- REAL-TIME FACE DETECTION AND HUMAN TRACKING SYSTEM ON FPGA CYCLONE-V
- REAL-TIME FACE DETECTION AND HUMAN TRACKING SYSTEM ON FPGA CYCLONE-V
- REAL-TIME FACE DETECTION AND HUMAN TRACKING SYSTEM ON FPGA CYCLONE-V
- REAL-TIME FACE DETECTION AND HUMAN TRACKING SYSTEM ON FPGA CYCLONE-V
- REAL-TIME FACE DETECTION AND HUMAN TRACKING SYSTEM ON FPGA CYCLONE-V
- REAL-TIME FACE DETECTION AND HUMAN TRACKING SYSTEM ON FPGA CYCLONE-V
- REAL-TIME FACE DETECTION AND HUMAN TRACKING SYSTEM ON FPGA CYCLONE-V
Published
2022-05-16
Section
Regular articles
An author's submission implies that the manuscript has not been published previously, and is not currently submitted for publication elsewhere. Submission also implies that the Corresponding Author has consent of all authors (the Authors). Upon acceptance for publication transfer of copyright will be made to the Publisher of REV-JEC, who guarantees that full content of the published article is freely distributed on the Journal's website. The copyright transfer gives the Publisher of REV-JEC full authority to resolve any complaints of misuse or abuse (such as infringement or plagiarism) of the published article. The Authors have the freedom to redistribute and reuse the published article in any medium or format for any purpose, provided the original published article is properly cited. An article submission implies author agreement with this policy.